Asynchronous pipelined interconnect architecture with fanout support

摘要

Circuits comprising an asynchronous programmable interconnect with fan out support that include a multi-port switch and a first and second buffer-switch circuit, and methods of forming such circuits, are provided. Additional circuits and methods are disclosed.

主权项

1. A circuit comprising:
a plurality of routing tracks for transmitting data signals in the circuit; and a multi-port switch point including:
a plurality of ports, each port being connected to a corresponding routing track from the plurality of routing tracks, anda buffer-switch circuit including:
a buffer circuit;a plurality of input switch-boxes configured to programmably couple one of the plurality of ports to an input of the buffer circuit;a plurality of output switch-boxes configured to programmably couple one of the plurality of ports to an output of the buffer circuit; anda completion detection element configured to combine control signals from control nodes of the ports and to provide a combined control signal at a control node of the output of the buffer circuit, the combined control signal including a combined acknowledge signal for data transmissions of the buffer-switch circuit.