发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To reduce area of an occupied region of I/O cells in a semiconductor integrated circuit device by reducing height of an I/O cell and preventing increase in width of the I/O cell at the same time.SOLUTION: A semiconductor integrated circuit device comprising I/O cells including a level shifter circuit, an I/O logic circuit, and an I/O buffer circuit and arranged around a core region. An I/O logic region in which the I/O logic circuit is arranged and an I/O buffer region in which the I/O buffer circuit is arranged overlap a region in which pads for the I/O cells are arranged and the I/O logic region and the I/O buffer region are arranged in juxtaposition with each other in a direction parallel with a side of the core region.SELECTED DRAWING: Figure 1 |
申请公布号 |
JP2016066823(A) |
申请公布日期 |
2016.04.28 |
申请号 |
JP20160012264 |
申请日期 |
2016.01.26 |
申请人 |
RENESAS ELECTRONICS CORP |
发明人 |
SAKAMOTO KAZUO;MORINO NAOZUMI;TANAKA KAZUO;ISHIZUKA HIROYASU |
分类号 |
H01L21/82;H01L21/822;H01L27/04;H01L27/06;H01L27/08 |
主分类号 |
H01L21/82 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|