发明名称 |
Data pattern generation for I/O testing of multilevel interfaces |
摘要 |
One feature is a method of reading data from a plurality of pattern registers, generating a first output at a mapping register from the read data, generating a second output, different from the first output, at the mapping register from the read data, and generating a multi-level signal using the first and second outputs. In one embodiment, generating the first output is done by adding a first plurality of bits to a second plurality of bits, and generating the second output is done by adding the first plurality of bits to an inverse of the second plurality of bits. |
申请公布号 |
US9324454(B2) |
申请公布日期 |
2016.04.26 |
申请号 |
US201314144432 |
申请日期 |
2013.12.30 |
申请人 |
QUALCOMM Incorporated |
发明人 |
Hollis Timothy Mowry |
分类号 |
G01R31/28;G11C29/36;G11C29/12;G06F11/263;G06F11/27;G11C29/02 |
主分类号 |
G01R31/28 |
代理机构 |
Loza & Loza, LLP |
代理人 |
Loza & Loza, LLP |
主权项 |
1. A method of operating a device, comprising:
reading data from one or more pattern registers of the device via a built-in test circuit; generating, via the built-in test circuit, a first output from a first mapping register using the read data; generating, via the built-in test circuit, a second output, different from the first output, from the first mapping register or a second mapping register using the read data; and generating a multi-level signal in the built-in test circuit using the first and second outputs. |
地址 |
San Diego CA US |