CONTACT LINERS FOR INTEGRATED CIRCUITS AND FABRICATION METHODS THEREOF

摘要

Contact liners for integrated circuits and fabrication methods thereof are presented. The methods include: fabricating an integrated circuit structure having a first transistor having at least one of a p-type source region or a p-type drain region and a second transistor having at least one of an n-type source region or an n-type drain region, and the fabricating including: forming a contact liner at least partially over both the first transistor and the second transistor, the contact liner including a first contact liner material and a second contact liner material, wherein the first contact liner material is selected to facilitate electrical connection to the at least one p-type source region or p-type drain region of the first transistor, and the second contact liner material is selected to facilitate electrical connection to the at least one n-type source region or n-type drain region of the second transistor.

主权项

1. A method comprising:
fabricating an integrated circuit structure comprising a first transistor and a second transistor, the first transistor having at least one of a p-type source region or a p-type drain region and the second transistor having at least one of an n-type source region or an n-type drain region, and the fabricating comprising:
forming a contact liner at least partially over both the first transistor and the second transistor, the contact liner comprising a first contact liner material with at least a portion directly contacting a surface of at least one the respective source region or the respective drain region of both the first transistor and the second transistor and a second contact liner material with at least a portion directly contacting another surface of at least one of the respective source region or the respective drain region of both the first transistor and the second transistor, wherein the first contact liner material is selected to facilitate electrical connection to the at least one p-type source region or p-type drain region of the first transistor, and the second contact liner material is selected to facilitate electrical connection to the at least one n-type source region or n-type drain region of the second transistor.