发明名称 THREE DIMENSIONAL (3D) FAN-OUT PACKAGING MECHANISMS
摘要 The mechanisms of forming a semiconductor device package provides a manufacturing process at low costs due to relative simple process flow. The warpage of the total package is greatly reduced by forming an interconnection structure having a redistribution layer(s) to bond at least one die to the lower part of a package structure. In addition, the interconnection structure is formed without using a molding compound, which reduces particle contamination. The reduction of the warpage and the particle contamination improves yield. Moreover, a semiconductor package formed, under a pace between a space between the package structure and the interconnection structure, has low form factor having the at least one die fit.
申请公布号 KR20160041888(A) 申请公布日期 2016.04.18
申请号 KR20160041214 申请日期 2016.04.04
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 LIN JING CHENG;CHANG CHIN CHUAN;HUNG JUI PIN
分类号 H01L23/522;H01L23/00;H01L23/31;H01L25/065 主分类号 H01L23/522
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