发明名称 Wiring Substrate and Semiconductor Device
摘要 A wiring substrate includes a core, a first wiring layer formed on a first surface of the core, and a second wiring layer formed on a second surface of the core. The first wiring layer includes a first opening, and the second wiring layer includes a second opening. The core includes a plurality of electronic component accommodating bores that extend through the core at portions exposed from the first and second openings. An electronic component is arranged in each electronic component accommodating bore. The electronic component accommodating bores are filled with an insulating layer. The core includes a partition located between adjacent electronic component accommodating bores. The partition is formed by part of the core.
申请公布号 US2016081194(A1) 申请公布日期 2016.03.17
申请号 US201514848453 申请日期 2015.09.09
申请人 Shinko Electric Industries Co., Ltd. 发明人 Sato Junji;Mochizuki Kiyotaka;KOBAYASHI Kazuhiro;FUKASE Katsuya
分类号 H05K1/18;H05K1/02 主分类号 H05K1/18
代理机构 代理人
主权项 1. A wiring substrate comprising: a core including a first surface and a second surface located at a side opposite to the first surface, wherein the core includes a plurality of electronic component accommodating bores that extend through the core in a thickness direction between the first surface and the second surface; a first wiring layer formed on the first surface of the core, wherein the first wiring layer includes a first opening; a second wiring layer formed on the second surface of the core, wherein the second wiring layer includes a second opening; a plurality of electronic components, each arranged in one of the electronic component accommodating bores; an insulating material covering the first surface and the second surface of the core, wherein the electronic component accommodating bores are filled with the insulating material; a first wiring structure formed on a first surface side of the core; and a second wiring structure formed on a second surface side of the core; wherein the electronic component accommodating bores extend through the core at portions exposed from the first opening of the first wiring layer and the second opening of the second wiring layer, and the core further includes a partition located between adjacent ones of the electronic component accommodating bores, the partition being formed by part of the core, wherein the partition includes a first surface exposed in the first opening of the first wiring layer, anda second surface exposed in the second opening of the second wiring layer.
地址 Nagano-shi JP