发明名称 Preventing Delamination and Cracks in Fabrication of Group III-V Devices
摘要 In an exemplary implementation, a method includes growing a III-Nitride body over a group IV substrate in a semiconductor wafer. The method includes forming at least one device layer over the III-Nitride body. The method also includes etching grid array trenches in the III-Nitride body, where the etching of the grid array trenches may extend into the group IV substrate. The method can also include forming an edge trench around a perimeter of the semiconductor wafer. The method further includes forming separate dies by cutting the semiconductor wafer approximately along the grid array trenches.
申请公布号 US2016079122(A1) 申请公布日期 2016.03.17
申请号 US201514945711 申请日期 2015.11.19
申请人 Infineon Technologies Americas Corp. 发明人 Briere Michael A.
分类号 H01L21/78;H01L23/00;H01L21/02 主分类号 H01L21/78
代理机构 代理人
主权项
地址 El Segundo CA US
您可能感兴趣的专利