发明名称 Quantum dot channel (QDC) quantum dot gate transistors, memories and other devices
摘要 This invention describes a field-effect transistor in which the channel is formed in an array of quantum dots. In one embodiment the quantum dots are cladded with a thin layer serving as an energy barrier. The quantum dot channel (QDC) may consist of one or more layers of cladded dots. These dots are realized on a single or polycrystalline substrate. When QDC FETs are realized on polycrystalline or nanocrystalline thin films they may yield higher mobility than in conventional nano- or microcrystalline thin films. These FETs can be used as thin film transistors (TFTs) in a variety of applications. In another embodiment QDC-FETs are combined with: (a) coupled quantum well SWS channels, (b) quantum dot gate 3-state like FETs, and (c) quantum dot gate nonvolatile memories.
申请公布号 US9287412(B2) 申请公布日期 2016.03.15
申请号 US201213465872 申请日期 2012.05.07
申请人 发明人 Jain Faquir Chand
分类号 H01L29/78;H01L29/788;B82Y10/00;B82Y40/00;H01L21/28;H01L29/423;H01L29/66;H01L31/028;H01L31/0352;H01L31/078;H01L29/12;G11C16/04;B82Y20/00;H01L29/06 主分类号 H01L29/78
代理机构 代理人 McHugh Steven M.
主权项 1. A quantum dot channel (QDC) field-effect transistor device, comprising: a substrate, wherein the substrate includes a source region,a gate region,a drain region, anda transport channel located between the source region and the drain region, wherein the transport channel is comprised of an array of cladded quantum dots, the cladded quantum dots being comprised of at least one Si and Ge and having a thin cladding layer comprised of at least one of SiOx and GeOx, and wherein the array of cladded quantum dots include a top layer of cladded quantum dots and a bottom layer of cladded quantum dots, the array of cladded quantum dots being assembled on a semiconductor substrate of p-type conductivity and being constructed from a semiconductor material which includes at least one of Si, Ge, InGaAs, GaAs, GaN,wherein the array of cladded quantum dots are deposited in a region between source region and the drain region, and wherein the cladding of the top layer of cladded quantum dots is deposited with a thin gate insulator layer,wherein the thin gate insulator layer is deposited with a gate material constructed from at least one of a metallic material and a semiconducting material which results in a pre-determined threshold voltage for the field-effect transistor.
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