| 发明名称 | Semiconductor integrated circuit device and process for manufacturing the same | ||
| 摘要 | A semiconductor substrate includes scribe and product regions, with grooves formed in the scribe region. The grooves are embedded with an insulating film to provide an isolation region, and an active region, including semiconductor elements, is formed in the product region. Dummy patterns are formed in the scribe region, which include a first dummy pattern and second dummy patterns for preventing dishing of the insulating film. The second dummy patterns are surrounded and defined by the isolation region. A target pattern for optical pattern recognition is arranged over the first dummy pattern, and includes a first conductive film. A plane area of the first dummy pattern is larger than a plane area of each of the second dummy patterns, and the first dummy pattern and the second dummy patterns are arranged in order from an edge of the semiconductor substrate toward the product region. | ||
| 申请公布号 | US9275956(B2) | 申请公布日期 | 2016.03.01 |
| 申请号 | US201514739818 | 申请日期 | 2015.06.15 |
| 申请人 | Renesas Electronics Corporation | 发明人 | Uchiyama Hiroyuki;Chakihara Hiraku;Ichise Teruhisa;Kaminaga Michimoto |
| 分类号 | H01L23/544;H01L23/58;G03F9/00;H01L21/3105;H01L21/762;H01L21/768;H01L21/66;H01L21/306;H01L21/78;H01L27/02;H01L29/78 | 主分类号 | H01L23/544 |
| 代理机构 | Roberts Mlotkowski Safran & Cole, P.C. | 代理人 | Montone Gregory E.;Roberts Mlotkowski Safran & Cole, P.C. |
| 主权项 | 1. A semiconductor device comprising: a semiconductor substrate including a scribe region and a product region; grooves formed in the scribe region; a first insulating film embedded in the grooves, the grooves with the first insulating film being configured to be used as an isolation region; an active region formed in the product region; a semiconductor element formed in the active region; and dummy patterns formed in the scribe region, wherein the dummy patterns include a first dummy pattern and a plurality of second dummy patterns configured for preventing a dishing of the first insulating film, wherein the second dummy patterns are surrounded and defined by the isolation region, wherein a target pattern is arranged over the first dummy pattern, includes a first conductive film and is configured to be used for optical pattern recognition, wherein a plane area of the first dummy pattern is larger than a plane area of each of the second dummy patterns, and wherein the first dummy pattern and the second dummy patterns are arranged in order from an edge of the semiconductor substrate toward the product region. | ||
| 地址 | Kawasaki JP | ||