发明名称 SYSTEM AND METHOD FOR MULTISTAGE PROCESSING IN A MEMORY STORAGE SUBSYSTEM
摘要 Embodiments of this disclosure relate to improving solid-state non-volatile memory management. Embodiments improve the management of solid-state non-volatile memory by providing an execution manager responsible for controlling the timing of providing a request to a memory unit for execution. In embodiments, the execution manager traverses a list of received requests for memory access and dispatches commands for execution. In embodiments, if a request is directed to memory units which have reached a threshold for outstanding requests, the request may be skipped so that other requests can be dispatched for memory units which have not yet reached the threshold.
申请公布号 US2016041773(A1) 申请公布日期 2016.02.11
申请号 US201514885018 申请日期 2015.10.16
申请人 Western Digital Technologies, Inc. 发明人 PHAN Lan D.
分类号 G06F3/06 主分类号 G06F3/06
代理机构 代理人
主权项 1. A storage subsystem, comprising: a controller; a non-volatile solid-state memory array, the non-volatile solid-state memory array including a plurality of memory units in electrical contact with the controller; wherein the controller is configured to: receive a plurality of requests for access to the non-volatile solid-state memory array, process each received request for execution and associate each received request with a memory unit in the plurality of memory units; maintain a list of the plurality of received requests; maintain a record of a number of outstanding requests associated with each of the plurality of memory units; selectively send a request from the list of received requests to the memory unit associated with the request; wherein a request is selected based at least in part on determining if a number of outstanding requests associated with a memory unit associated with the request is less than an outstanding request threshold.
地址 Irvine CA US