发明名称 |
Method for forming a semiconductor device with a trench and an isolation |
摘要 |
A method for forming a semiconductor device. One embodiment provides a semiconductor substrate having a trench with a sidewall isolation. The sidewall isolation is removed in a portion of the trench. A gate dielectric is formed on the laid open sidewall. A gate electrode is formed adjacent to the date dielectric. The upper surface of the gate electrode is located at a depth d1 below the surface of the semiconductor substrate. The gate oxide is removed above the gate electrode. An isolation is formed simultaneously on the gate electrode and the semiconductor substrate such that the absolute value of height difference d2 between the isolation over the gate electrode and the isolation over the semiconductor substrate is smaller than the depth d1. |
申请公布号 |
US9257532(B2) |
申请公布日期 |
2016.02.09 |
申请号 |
US201314132008 |
申请日期 |
2013.12.18 |
申请人 |
Infineon Technologies AG |
发明人 |
Poelzl Martin |
分类号 |
H01L21/3205;H01L29/66;H01L29/78;H01L21/28;H01L29/40;H01L29/417 |
主分类号 |
H01L21/3205 |
代理机构 |
Dicke, Billig & Czaja, PLLC |
代理人 |
Dicke, Billig & Czaja, PLLC |
主权项 |
1. A method for manufacturing a semiconductor device, comprising:
providing a semiconductor substrate having a trench with a sidewall isolation; removing the sidewall isolation in a portion of the trench; forming a gate dielectric on the laid open sidewall in the portion of the trench; forming a gate electrode adjacent to the gate dielectric, an upper surface of the gate electrode being located at a depth dl below the surface of the semiconductor substrate such that the gate dielectric is exposed in an upper portion of the trench, wherein the gate electrode comprises doped polysilicon; performing an implantation after the formation of the gate electrode to provide the upper surface of the gate electrode with a higher doping concentration; removing, subsequent to forming the gate electrode and subsequent to performing the implantation, the gate dielectric above the gate electrode; and forming, subsequent to removing the gate dielectric, an isolation simultaneously on the gate electrode and the semiconductor substrate such that an absolute value of height difference d2 between the isolation over the gate electrode and the isolation over the semiconductor substrate is smaller than the depth d1. |
地址 |
Nuebiberg DE |