MEMS display pixel control circuits and methods

摘要

This disclosure provides novel latching circuits, and pixel circuits and display devices that include such latching circuits. The latches herein include a switch positioned on an inverter coupling interconnect which couples two cross-coupled inverters of the latch. The switch is configured to control a passage of a current between the first and second inverters. By switching the switch OFF at a time a data voltage is transferred to the inverters, any leak current between the inverters can be interrupted. As a result, a malfunctioning of the data latch is prevented.

主权项

1. An apparatus, comprising:
a plurality of MEMS devices arranged in an array; and a control circuit coupled to the plurality of MEMS devices to communicate data and drive voltages to the MEMS devices, the control circuit, for each MEMS device, including:
a latch configured to actuate a shutter of the MEMS device, the latch including:
first and second cross-coupled inverters, each including at least two transistors; andan inverter coupling interconnect coupling gates of the at least two transistors of the first inverter to drains of the at least two transistors of the second inverter; andan inverter coupling interconnect switch including a transistor positioned on the inverter coupling interconnect configured to control a passage of a current between the first and second inverters;a second switch including a transistor that is coupled to the inverter coupling interconnect and to the gate of the at least two transistors of the first inverter and is configured to communicate the data to the gate of the at least two transistors of the first inverter;a latching control line coupled to the inverter coupling interconnect switch; anda data transfer control line coupled to the second switch,wherein a latch control signal from the latching control line causes the inverter coupling interconnect switch to switch to an OFF state at a time that the second switch communicates the data to the gate of the at least two transistors of the first inverter based on a data transfer control signal from the data transfer control line.