发明名称 |
DEBUG CIRCUIT COMPARING PROCESSOR INSTRUCTION SET OPERATING MODE |
摘要 |
<p>A processor is operative to execute two or more instruction sets, each in a different instruction set operating mode. As each instruction is executed, debug circuit comparison the current instruction set operating mode to a target instruction set operating mode sent by a programmer, and outputs an alert or indication in they match. The alert or indication may additionally be dependent upon the instruction address following within a predetermined target address range. The alert or indication may comprise a breakpoint signal that halts execution and/or it is output as an external signal of the processor. The instruction address at which the processor detects a match in the instruction set operating modes may additionally be output. Additionally or alternatively, the alert or indication may comprise starting or stopping a trace operation, causing an exception, or any other known debugger function.</p> |
申请公布号 |
CA2658829(C) |
申请公布日期 |
2016.01.05 |
申请号 |
CA20072658829 |
申请日期 |
2007.08.03 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
BURKE, KEVIN CHARLES;STEMPEL, BRIAN MICHAEL;STREETT, DAREN EUGENE;SAPP, KEVIN ALLEN;DEBRUYNE, LESLIE MARK;RIZK, NABIL AMIR;SARTORIUS, THOMAS ANDREW;SMITH, RODNEY WAYNE |
分类号 |
G06F11/36 |
主分类号 |
G06F11/36 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|