发明名称 情報処理システムおよびデータ記録制御方法
摘要 <p>In an information processing system, a processor requests a first transfer control circuit to transfer data to a first memory. In response to the request from the processor, the first transfer control circuit sends the data to a second transfer control circuit. The second transfer control circuit stores in a second memory the data received from the first transfer control circuit, and also stores the data in the first memory through the first transfer control circuit.</p>
申请公布号 JP5835040(B2) 申请公布日期 2015.12.24
申请号 JP20120061509 申请日期 2012.03.19
申请人 富士通株式会社 发明人 羽根田 光正
分类号 G06F3/06 主分类号 G06F3/06
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