发明名称 SUCCESSIVE APPROXIMATION TYPE A/D CONVERTER
摘要 PROBLEM TO BE SOLVED: To provide a successive approximation type A/D converter which is suitable for achieving drive control of a group of switches by a required minimum control period by a simple circuit configuration. SOLUTION: The successive approximation type A/D converter 1 is constituted by including: first to n-th capacitors 106_1 to 106_n; the group of switches 105_1 to 105_(n-1); a control part 101; and a comparator 104. The control part 101 is constituted by including: a delay amount control circuit 301 including a counter 301a and a control circuit 301b; an arbitrary delay circuit 302; and a control signal generation circuit 303. The delay amount control circuit 301 controls a delay amount of the arbitrary delay circuit 302 based on a counter value, the arbitrary delay circuit 302 delays a clock signal MCLK from an oscillator by the controlled delay amount to output a delay clock signal DCLK, and the control signal generation circuit 303 generates control signals CTRL105_1 to 105_(n-1) in the required minimum control period Tk based on DCLK. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011114577(A) 申请公布日期 2011.06.09
申请号 JP20090269080 申请日期 2009.11.26
申请人 ASAHI KASEI ELECTRONICS CO LTD 发明人 NAKANISHI JUNYA
分类号 H03M1/38 主分类号 H03M1/38
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