发明名称 METHODS OF DIVIDING LAYOUTS AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING THE SAME
摘要 Target pattern layouts that include lower and upper target patterns are designed. Each lower target pattern is combined with a upper target pattern that at least partially overlaps a top surface thereof to form combination structures. The combination structures are divided into first and second combination structures. A first target pattern is formed from the lower target pattern in the first combination structure and a third target pattern is formed from the upper target pattern in the first combination structure. The first and third target patterns are formed in first and third lithography processes, respectively. A second target pattern is formed from the lower target pattern in the second combination structure and a fourth target pattern is formed from the upper target pattern in the second combination structure. The second and fourth target patterns are formed in second and fourth lithography processes, respectively.
申请公布号 US2015011022(A1) 申请公布日期 2015.01.08
申请号 US201414261299 申请日期 2014.04.24
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 Lee Jeong-Hoon;Seo Sang-Wook;Shin Hye-Soo
分类号 H01L21/033;H01L21/66;G06F17/50 主分类号 H01L21/033
代理机构 代理人
主权项 1. A method of dividing a target pattern layout, comprising: designing target pattern layouts, including layouts of lower target patterns and upper target patterns; combining each lower target pattern with an upper target pattern that at least partially overlaps a top surface of the lower target pattern to form combination structures; dividing the combination structures into a first combination structure and a second combination structure; forming a first target pattern from the lower target pattern in the first combination structure in a first lithography process and a third target pattern from the upper target pattern in the first combination structure in a third lithography process; and forming a second target pattern from the lower target pattern in the second combination structure in a second lithography process and a fourth target pattern from the upper target pattern in the second combination structure in a fourth lithography process, wherein the steps of designing the layout of the target patterns, combining each of the lower target patterns with the upper target pattern to form the combination structures, dividing the combination structures into the first combination structure and the second combination structure, forming the first target pattern and the third target pattern, and forming the second target pattern and the fourth target pattern are performed using a computer.
地址 Suwon-si KR