| 发明名称 | Three dimensional dual-port bit cell and method of assembling same | ||
| 摘要 | A three dimensional dual-port bit cell generally comprises a first portion of a latch disposed on a first tier, wherein the first portion includes a plurality of first port elements. A second portion of the latch is disposed on a second tier that is vertically stacked with respect to the first tier using at least one via, wherein the second portion includes a plurality of second port elements. | ||
| 申请公布号 | US9208854(B2) | 申请公布日期 | 2015.12.08 |
| 申请号 | US201314098567 | 申请日期 | 2013.12.06 |
| 申请人 | Taiwan Semiconductor Manufacturing Co., Ltd. | 发明人 | Lin Tzu-Kuei;Liao Hung-Jen;Chen Yen-Huei |
| 分类号 | G11C11/00;G11C11/413;H01L27/11;G11C7/10;H01L25/065;G11C11/40 | 主分类号 | G11C11/00 |
| 代理机构 | Duane Morris LLP | 代理人 | Duane Morris LLP |
| 主权项 | 1. A three dimensional dual-port bit cell comprising: a latch comprising first and second cross-coupled inverters; a first portion of the latch disposed on a first tier, wherein said first portion comprises a plurality of first port elements and the first inverter; a second portion disposed on a second tier that is vertically stacked with respect to the first tier using at least one via, wherein said second portion comprises a plurality of second port elements of the latch and the second inverter. | ||
| 地址 | Hsin-Chu TW | ||