发明名称 |
Thin film transistor having four different gate electrodes |
摘要 |
Provided is a transistor including an oxide semiconductor in a channel formation region in which the threshold voltage is controlled, which is a so-called normally-off switching element. The switching element includes a first insulating film, an oxide semiconductor layer over the first insulating film and includes a channel formation region, a second insulating film covering the oxide semiconductor layer, a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer. The semiconductor device further includes a first gate electrode layer overlapping the channel formation region with the first insulating film therebetween, a second gate electrode layer overlapping the channel formation region with the second insulating film therebetween, and a third gate electrode layer overlapping a side surface of the oxide semiconductor layer in a channel width direction with the second insulating film therebetween. |
申请公布号 |
US9190529(B2) |
申请公布日期 |
2015.11.17 |
申请号 |
US201414554208 |
申请日期 |
2014.11.26 |
申请人 |
Semiconductor Energy Laboratory Co., Ltd. |
发明人 |
Yamazaki Shunpei |
分类号 |
H01L29/00;H01L29/786;H01L29/24;H01L29/49;H01L27/12;H01L29/423 |
主分类号 |
H01L29/00 |
代理机构 |
Fish & Richardson P.C. |
代理人 |
Fish & Richardson P.C. |
主权项 |
1. A semiconductor device comprising:
a first gate electrode layer; a first insulating film over the first gate electrode layer; an oxide semiconductor layer comprising a channel formation region and overlapping the first gate electrode layer with the first insulating film therebetween; a source electrode layer and a drain electrode layer over and electrically connected to the oxide semiconductor layer; a second insulating film over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; a second gate electrode layer overlapping the channel formation region with the second insulating film therebetween; a third gate electrode layer over the second insulating film and overlapping a first end portion of the oxide semiconductor layer; and a fourth gate electrode layer over the second insulating film and overlapping a second end portion of the oxide semiconductor layer that is opposite the first end portion; wherein the third gate electrode layer and the fourth gate electrode layer each extend in a direction that intersects with a channel length direction of the channel formation region. |
地址 |
Kanagawa-ken JP |