发明名称 |
Integrated circuit with backside structures to reduce substrate warp |
摘要 |
Wafer bowing induced by deep trench capacitors is ameliorated by structures formed on the reverse side of the wafer. The structures on the reverse side include tensile films. The films can be formed within trenches on the back side of the wafer, which enhances their effect. In some embodiments, the wafers are used to form 3D-IC devices. In some embodiments, the 3D-IC device includes a high voltage or high power circuit. |
申请公布号 |
US9184041(B2) |
申请公布日期 |
2015.11.10 |
申请号 |
US201313925940 |
申请日期 |
2013.06.25 |
申请人 |
Taiwan Semiconductor Manufacturing Co., Ltd. |
发明人 |
Chen Chih-Ming;Wang Szu-Yu;Yu Chung-Yi |
分类号 |
H01L21/02;H01L21/822 |
主分类号 |
H01L21/02 |
代理机构 |
Eschweiler & Associates, LLC |
代理人 |
Eschweiler & Associates, LLC |
主权项 |
1. An integrated circuit device, comprising:
a first semiconductor substrate having a frontside and a backside; first structures including deep trench capacitors formed in trenches extending downwardly into the frontside, the first structures comprising frontside dielectric and conductive layers which are stacked over one another in the trenches and at least one of the frontside dielectric and conductive layers being configured to exert stress on the frontside of the first semiconductor substrate; and second structures formed on the backside of the semiconductor substrate, the second structures comprising backside dielectric and conductive layers which correspond in a one-to-one manner to the frontside dielectric and conductive layers and which have material compositions corresponding to those of the frontside dielectric and conductive layers, respectively, wherein at least one of the backside dielectric and conductive layers is configured to exert stress on the backside of the first semiconductor substrate; and an additional backside layer abutting an outermost layer of the backside dielectric and conductive layers, the additional backside layer exerting additional stress on the backside of the first semiconductor substrate. |
地址 |
Hsin-Chu TW |