发明名称 Semiconductor wiring patterns
摘要 A semiconductor device includes a rectangular semiconductor element mounted on a substrate formed with an external input terminal, an external output terminal, and a plurality of wiring patterns connected to each of the external input terminal and the external output terminal. The semiconductor element includes, a plurality of first electrodes formed along a first edge of a surface thereof, a plurality of second electrodes formed along an edge opposite to the first edge of the surface, a plurality of third electrodes formed in the neighborhood of a functional block, and an internal wiring for connecting the first electrodes and the third electrodes. The substrate includes, a first wiring pattern for connecting the external input terminal and the first electrodes, a second wiring pattern for connecting the external output terminal and the second electrodes, and a third wiring pattern for connecting the first electrodes and the third electrodes.
申请公布号 US9171802(B2) 申请公布日期 2015.10.27
申请号 US201414186013 申请日期 2014.02.21
申请人 LAPIS SEMICONDUCTOR CO., LTD. 发明人 Nakayama Akira
分类号 H01L23/48;H01L23/528;G09G3/36;H01L23/00 主分类号 H01L23/48
代理机构 Volentine & Whitt, PLLC 代理人 Volentine & Whitt, PLLC
主权项 1. A semiconductor device having a rectangular semiconductor element mounted on a substrate formed with an external input terminal, an external output terminal, and a plurality of wiring patterns connected to each of the external input terminal and the external output terminal, wherein, the semiconductor element comprises: a plurality of first electrodes formed along a first edge of a surface thereof; a plurality of second electrodes formed along an edge opposite to the first edge of the surface; a plurality of third electrodes formed in a neighborhood of a functional block; and an internal wiring for connecting the first electrodes and the third electrodes, and the substrate comprises: a first wiring pattern for connecting the external input terminal and the first electrodes;a second wiring pattern for connecting the external output terminal and the second electrodes; anda third wiring pattern for connecting the first electrodes and the third electrodes, wherein the plurality of first electrodes and the plurality of second electrodes are formed along an outer edge of the semiconductor element, and wherein the internal wiring and the third wiring pattern are connected in parallel to each other between the first electrodes and the third electrodes.
地址 Yokohama JP