发明名称 |
INTEGRATOR-SLEW RATE AND BANDWIDTH ENHANCEMENT IN RESET MODE |
摘要 |
<p>One way to sense a capacitance is to convert it to charge and measure the charge quantity. Charge and capacitance are related by Q=CV where Q=charge, C=capacitance and V=voltage. The G3, G4 and G5 capacitance sense solutions convert the capacitance into charge by modulating the voltage across it and integrating the resulting current. On G4 this used an integration capacitor with two capacitors in feedback where one capacitor is always integrating while the second can be reset in parallel (see CD10109).</p> |
申请公布号 |
IN1202DE2012(A) |
申请公布日期 |
2015.10.16 |
申请号 |
IN2012DE01202 |
申请日期 |
2012.04.18 |
申请人 |
CYPRESS SEMICONDUCTOR CORPORATION |
发明人 |
VM SARAVANAN;GERARD BALDWIN;PAUL WALSH;KAVEH HOSSEINI |
分类号 |
H04N |
主分类号 |
H04N |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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