发明名称 Uniformity in Wafer Patterning using Feedback Control
摘要 A method for patterning a wafer includes performing a first patterning on a wafer, and after performing the first patterning, calculating a simulated dose mapper (DoMa) map predicting a change in critical dimensions of the wafer due to performing a second patterning on the wafer. The method further includes performing the second patterning on the wafer. Performing the second patterning includes adjusting one or more etching parameters of the second patterning in accordance with differences between the simulated DoMa map and desired critical dimensions of the wafer.
申请公布号 US2015279750(A1) 申请公布日期 2015.10.01
申请号 US201514735657 申请日期 2015.06.10
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Wu Chung-Hsi;Liao Han-Wen;Lin Chih-Yu;Tsuei Cherng-Chang
分类号 H01L21/66;H01L21/3065;H01L21/683 主分类号 H01L21/66
代理机构 代理人
主权项 1. A method comprising: calculating a simulation map predicting a change in critical dimensions of a wafer due to etching a pattern on the wafer, wherein the simulation map is in accordance with critical dimensions of a previous pattern on the wafer; and etching the pattern on the wafer, wherein etching the pattern comprises at least one of: adjusting one or more etching parameters for etching the pattern in accordance with differences between the simulation map and desired critical dimensions of the wafer; andfine tuning the previous pattern in accordance with the simulation map and desired critical dimensions of the wafer.
地址 Hsin-Chu TW
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