发明名称 PACKAGE SUBSTRATE AND METHOD FOR MANUFACTURING PACKAGE SUBSTRATE
摘要 A package substrate includes interlayer insulating layers including outermost and inner-layer layers, conductor layers including an outermost layer, a first layer between the outermost and inner-layer layers, and a second layer on which the inner-layer layer is formed, via conductors including first and second conductors through the outermost insulating layer, and skip via conductors through the outermost and inner-layer insulating layers to connect the outermost and second conductor layers. The outermost conductor layer includes first and second pads to mount first and second electronic components on the outermost insulating layer, the first conductors are positioned to connect the first conductor layer and first pads, the second conductors are positioned to connect the first conductor layer and second pads, and the first conductor layer has area on surface of the inner-layer insulating layer which is in range of 3 to 15% of area of the surface of the inner-layer insulating layer.
申请公布号 US2015279772(A1) 申请公布日期 2015.10.01
申请号 US201514669393 申请日期 2015.03.26
申请人 IBIDEN CO., LTD. 发明人 INAGAKI Yasushi;Takahashi Yasuhiro;Kurokawa Satoshi
分类号 H01L23/498;H01L21/48 主分类号 H01L23/498
代理机构 代理人
主权项 1. A package substrate, comprising: a plurality of interlayer resin insulating layers comprising an outermost interlayer resin insulating layer and an inner-layer interlayer resin insulating layer; a plurality of conductor layers comprising an outermost conductor layer formed on the outermost interlayer resin insulating layer, a first conductor layer formed between the outermost interlayer resin insulating layer and the inner-layer interlayer resin insulating layer, and a second conductor layer on which the inner-layer interlayer resin insulating layer is formed; a plurality of via conductors comprising a plurality of first via conductors formed through the outermost interlayer resin insulating layer and a plurality of second via conductors formed through the outermost interlayer resin insulating layer; and a plurality of skip via conductors formed through the outermost interlayer resin insulating layer and the inner-layer interlayer resin insulating layer such that the skip via conductors are connecting the outermost conductor layer and the second conductor layer, wherein the outermost conductor layer includes a plurality of first pads positioned to mount a first electronic component on the outermost interlayer resin insulating layer and a plurality of second pads positioned to mount a second electronic component on the outermost interlayer resin insulating layer, the plurality of first via conductors is positioned such that the first via conductors are connecting the first conductor layer and the first pads, the plurality of second via conductors is positioned such that the second via conductors are connecting the first conductor layer and the second pads, and the first conductor layer is formed such that the first conductor layer has an area on a surface of the inner-layer interlayer resin insulating layer which is in a range of 3% to 15% of an area of the surface of the inner-layer interlayer resin insulating layer.
地址 Ogaki-shi JP