发明名称 DATA TRANSFER CONTROLLER AND ELECTRONIC EQUIPMENT
摘要 PROBLEM TO BE SOLVED: To provide a data transfer controller, etc. by which higher efficiency of serial transfer is attained. SOLUTION: A link controller 100, when a read request packet for requesting to read a status of a vertical synchronizing signal is received, sets a first packet buffer 301 in a packet buffer for reception, sets a second packet buffer 302 in a packet buffer for transmission, reads a response packet or an acknowledge packet to the read request packet from the second packet buffer 302 and transmits it via a serial bus. When a write request packet is received after that, the link controller 100 sets the first and second packet buffers 301, 302 in the packet buffer for reception and outputs a command or data whose write is requested to an interface circuit 110 via either of the first and second packet buffers 301, 302. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007242026(A) 申请公布日期 2007.09.20
申请号 JP20070069413 申请日期 2007.03.16
申请人 SEIKO EPSON CORP 发明人 HONDA HIROYASU
分类号 G06F13/38 主分类号 G06F13/38
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