| 摘要 |
A internal voltage generator in a semiconductor memory device has a first and second internal voltage generators. The first internal voltage generator outputs a first signal having a first voltage level to internal circuits of the memory device during an active mode of the memory device operation. The second internal voltage generator outputs a second signal having a second voltage level to the internal circuits of the memory device; however, the second signal is interrupted in absence of a predetermined level of a power control signal during the active mode of the memory device operation. The internal voltage control unit monitors the operational signals generated by the memory device and outputs the predetermined level of the power control signal during a plurality of active sections of the active mode of the memory device operation requiring power.
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