| 摘要 |
PURPOSE:To attain fault recovery processing by rewriting the contents of a buffer storage area in a main storage based on a main storage address corrected in a 1st processor at the time of detecting a correctable fault when a 2nd processor retrieves a buffer address array. CONSTITUTION:At the time of detecting a correctable fault, an ECC circuit 307 outputs a fault detecting signal 315 and a corrected main storage (MS) address 316 and sends a fault report signal 314. The signal 315 goes a rewriting request to the MS 101 through an OR circuit 309. The address 316 after correction goes a rewriting address to the MS 101 through an OR circuit 308. The rewriting data are data 303 read out of an entry concerned in a buffer storage (BS) 301. At the time of receiving the rewriting request, the MS 101 rewrites the data 303 in a sent address area. At the time of receiving the signal 314, a processor 102 generates the block transfer request to the MS 101, fetches a block including the data of the MS 101 to the BS 201 and registers the address concerned in a buffer address array (BAA) 202. |
