发明名称 TIMING ADJUSTMENT METHOD OF INTEGRATED CIRCUIT AND COMPUTER PROGRAM
摘要 PROBLEM TO BE SOLVED: To provide a timing adjustment method, capable of correcting timing error in consideration of influence on all paths in an integrated circuit, and a computer program therefor. SOLUTION: The timing adjustment method includes correcting timing error in each path of the integrated circuit by inserting a buffer cell to each cell constituting the path. At that time, sensitivity information showing the degree of influence on a slack that is a tolerance for a timing regulation for each path is provided for each cell. The timing error is corrected using the sensitivity information. According to this, the timing error can be corrected with consideration of the influence on a path free from timing error (MET path). Consequently, induction of a path with timing error (error path) can be prevented. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009163490(A) 申请公布日期 2009.07.23
申请号 JP20080000340 申请日期 2008.01.07
申请人 FUJITSU MICROELECTRONICS LTD 发明人 KIMATA ATSUSHI
分类号 G06F17/50;H01L21/82 主分类号 G06F17/50
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