| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To reduce the size of a semiconductor device by reducing an occupied area by a clamping circuit in a surface of the semiconductor device, wherein the semiconductor device includes a power terminal to which a high voltage is applied, the clamping circuit electrically connected to the power terminal, and an internal circuit electrically connected to the clamping circuit and driven at a low voltage. <P>SOLUTION: The semiconductor device 10 comprises: the clamping circuit 13 electrically connected to the power terminal 11 to which the high voltage V<SB>DD1</SB>is applied; and the internal circuit 14 electrically connected to the clamping circuit 13 and is driven at a reference voltage V<SB>REF</SB>lower than the high voltage V<SB>DD1</SB>. The clamping circuit 13 is formed by using an NPN type bipolar transistor 21. An emitter of the NPN type bipolar transistor 21 is electrically connected to the power terminal 11. A collector of the NPN type bipolar transistor 21 is grounded. A base of the NPN type bipolar transistor 21 is electrically connected to the collector of the NPN type bipolar transistor 21. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
