ASYMMETRIC TRANSMIT/RECEIVE DATA RATE CIRCUIT INTERFACE

摘要

A system implements asymmetric data transfer between circuit blocks. The asymmetric data rate is between receivers and transmitters of different integrated circuits across a set of channels. In an embodiment, a first circuit or memory controller includes a transmission circuit to transmit data at a first data, rate over a data channel 8 to a reception circuit of a second circuit or a memory 6. The first circuit or memory controller also includes a reception circuit to receive data at a second data rate, different from the first data rate, over a data channel from a transmission circuit of the second circuit or memory. Thus, data is transferred at a greater rate per channel in one direction between circuits compared to the other direction. For example, a data transfer rate for either a read data operation or a write data operation exceeds the transfer rate of the other operation.