发明名称 DATA PROCESSOR
摘要 PROBLEM TO BE SOLVED: To provide a data processor capable of reducing power consumption at the time of execution of a spin wait loop for a spinlock. SOLUTION: A CPU 21 executes a weighted load instruction at the time of performing a spinlock process and then outputs a spin wait request to a corresponding cache memory 25. When the spin wait request is received from the CPU 21, the cache memory 25 temporarily stops outputting an acknowledge response to a read request from the CPU until a predetermined condition (snoop write hit, interrupt request, or lapse of predetermined time) is satisfied. Therefore, pipeline execution of the CPU 21 is stalled and the operation of the CPU 21 and the cache memory 25 can be temporarily stopped, and power consumption at the time of executing a spin wait loop can be reduced. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011150422(A) 申请公布日期 2011.08.04
申请号 JP20100009234 申请日期 2010.01.19
申请人 RENESAS ELECTRONICS CORP 发明人 TAKADA HIROKAZU
分类号 G06F9/52;G06F12/08 主分类号 G06F9/52
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