| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a technique for accurately counting the number of cash misses occurring in a cache memory mounted in an arithmetic processing unit by excluding an influence of a program (for example, a virtual machine) executed immediately before.SOLUTION: A PMC 114 causes an interrupt when cache misses in a primary cache memory 112 are counted for a sampling periodα. In response to the occurrence of the interrupt, an interrupt handling unit 24 asks a cache miss count calculation unit 25 and receives the number S of cache misses estimated to have occurred due to an influence of other virtual machines 3 till then. If the received number S of cache misses is 0, the interrupt handling unit 24 notifies a virtual machine 3 of the interrupt. If the received number S of cache misses is 1 or more, the interrupt handling unit 24 invalidates the interrupt and sets a value calculated by using the number S of cache misses, to the PMC 114.</p> |
