System and method for reducing on-chip memory for frame buffer storage in WCDMA receiver

摘要

A method of reducing an on-chip memory associated with storing frame buffer in WCDMA receiver includes obtaining, at a WCDMA front end receiver, an signal, transmitting, by an analog to digital convertor, input samples to a digital to digital sigma-delta converter, converting, by a sample rate convertor, a sampling rate associated with the input samples to a desired sampling rate for a rake receiver, quantizing, by the digital to digital sigma-delta converter, the input samples with a first number of bits to a converted data samples of a reduced number of bits, storing, at a memory unit, the converted data samples of the reduced number of bits, filtering the noise from the converted data samples to obtain a noise filtered converted data samples of the reduced number of bits, and decoding, at a WCDMA receiver processing unit, the noise filtered converted data samples over an entire radio frame.

主权项

1. A system for reducing an on-chip memory associated with storing frame buffer, said system comprising:
(i) a WCDMA receiver; wherein said WCDMA receiver comprises:
(a) a WCDMA front end receiver configured to receive a signal;(b) an analog to digital convertor communicatively associated with said WCDMA front end receiver and configured to generate a plurality of digital input samples using said received signal, wherein said plurality of digital input samples comprises at least one bit per input sample;(c) a sample rate convertor communicatively associated with said analog to digital converter and configured to convert a sampling rate associated with said plurality of digital input samples to a desired sampling rate for a rake receiver;(d) a digital to digital sigma-delta converter communicatively associated with said sample rate converter and configured to quantize said plurality of digital input samples with a first number of bits to a plurality of converted data samples with a reduced number of bits, wherein a noise is introduced when said plurality of digital input samples are quantized to said plurality of converted data samples;(e) a memory unit communicatively associated with said digital to digital signal-delta converter and configured to store said converted data samples(f) a digital low pass filter communicatively associated with said memory unit and configured to filter said noise from said plurality of converted data samples obtained from said memory unit to generate a plurality of noise filtered converted data samples with said reduced number of bits.