发明名称 MULTIPLEXER
摘要 A multiplexer may include a first circuit, a second circuit, and a third circuit. The first circuit may be configured to receive a first input signal and a first trigger signal and to output a first output signal that may be based on the first input signal during a first level of the first trigger signal and may be at a known level during a second level of the first trigger signal. The second circuit may be configured to receive a second input signal and a second trigger signal and to output a second output signal that may be based on the second input signal during a first level of the second trigger signal and may be at the known level during a second level of the second trigger signal. The third circuit may be configured to output a third output signal based on the first and second output signals.
申请公布号 US2015229327(A1) 申请公布日期 2015.08.13
申请号 US201414179341 申请日期 2014.02.12
申请人 FUJITSU LIMITED 发明人 NEDOVIC Nikola
分类号 H03M9/00;H03K5/13 主分类号 H03M9/00
代理机构 代理人
主权项 1. A multiplexer comprising: a first circuit configured to receive a first input signal and a first trigger signal and to output a first output signal on a first output node, the first output signal being based on the first input signal during a first level of the first trigger signal and being at a known level during a second level of the first trigger signal; a second circuit configured to receive a second input signal and a second trigger signal and to output a second output signal on a second output node, the second output signal being based on the second input signal during a first level of the second trigger signal and being at the known level during a second level of the second trigger signal, the second trigger signal being an inversion of the first trigger signal; and a third circuit coupled to the first output node and the second output node and configured to output a third output signal based on the first and second output signals.
地址 Kawasaki-shi JP