发明名称 Read voltage generation circuit, memory and memory system including the same
摘要 A read voltage generation circuit includes a register unit configured to store an initial read voltage code, a counter circuit configured to change a read voltage code in every read-retry operation, wherein an initial value of the read voltage code is the initial read voltage code; and a voltage generation circuit configured to generate a read voltage corresponding to a read voltage code produced by the counter circuit.
申请公布号 US9036418(B2) 申请公布日期 2015.05.19
申请号 US201313745272 申请日期 2013.01.18
申请人 SK hynix Inc. 发明人 Oh Seung-Min
分类号 G11C16/04;G11C16/26;G11C11/56;G11C16/16 主分类号 G11C16/04
代理机构 IP & T Group LLP 代理人 IP & T Group LLP
主权项 1. A read voltage generation circuit comprising: a register unit configured to store an initial read voltage code; a counter circuit configured to change a read voltage code in every read-retry operation, wherein an initial value of the read voltage code is the initial read voltage code; and a voltage generation circuit configured to generate a read voltage corresponding to the read voltage code produced by the counter circuit, wherein a counting step of the counter circuit is set to be small when a memory block that is provided with the read voltage operates as a Multi-Level Cell (MLC), and is set to be large when the memory block that is provided with the read voltage operates as a Single-Level Cell (SLC).
地址 Gyeonggi-do KR
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