发明名称 Data processing method and apparatus for prefetching
摘要 A data processing device includes processing circuitry 20 for executing a first memory access instruction to a first address of a memory device 40 and a second memory access instruction to a second address of the memory device 40, the first address being different from the second address. The data processing device also includes prefetching circuitry 30 for prefetching data from the memory device 40 based on a stride length 70 and instruction analysis circuitry 50 for determining a difference between the first address and the second address. Stride refining circuitry 60 is also provided to refine the stride length based on factors of the stride length and factors of the difference calculated by the instruction analysis circuitry 50.
申请公布号 US9037835(B1) 申请公布日期 2015.05.19
申请号 US201314061842 申请日期 2013.10.24
申请人 ARM Limited 发明人 Dasika Ganesh Suryanarayan;Holm Rune
分类号 G06F9/00;G06F12/08;G06F15/00 主分类号 G06F9/00
代理机构 Nixon & Vanderhye P.C. 代理人 Nixon & Vanderhye P.C.
主权项 1. A data processing device comprising: processing circuitry configured to execute a first memory access instruction to a first address of a memory device and a second memory access instruction to a second address of said memory device, wherein said first address is different from said second address; prefetching circuitry configured to prefetch data from said memory device in dependence on a stride length; instruction analysis circuitry configured to determine a difference between said first address and said second address; stride refining circuitry configured to refine said stride length based on factors of said stride length and factors of said difference.
地址 Cambridge GB