发明名称 低インダクタンス一体型キャパシタアセンブリ
摘要 <p>The invention provides an integral high-voltage capacitor assembly that yields very low self inductance and provides voltage and current multiplication. The capacitor assembly has two or four capacitors connected in series, with each capacitor made up of a stack of capacitor cells (40) also connected in series. Each of the capacitor cells (40) includes an arrangement of a pair of elongate foil electrodes (10) separated by dielectric (20, 30), and multiply-folded in a substantially flat, wound configuration. In the case of the two-capacitor assembly, in one embodiment the adjacent capacitor cells of the first capacitor (11) are connected in series by joining their foil electrodes on only one longitudinal side of the foil electrodes, while the adjacent capacitor cells of the second capacitor (12) are connected in series by joining their foil electrodes on both longitudinal sides of the foil electrodes. By connecting two units of the two-capacitor assemblies in different ways, various four-capacitor assemblies (80; 90) can be configured to provide enhanced voltage and current multiplication.</p>
申请公布号 JP5714605(B2) 申请公布日期 2015.05.07
申请号 JP20120547042 申请日期 2010.12.30
申请人 スペックスキャン・エスディーエヌ・ビーエイチディー 发明人 クム・サン・ロウ;アルバート・コク・フー・ング;チー・ホン・ロウ;クム・ワン・ロウ;デヴィッド・マハデヴァン;チン・ヤン・チア;キーン・フォ・チョン
分类号 H01G4/38;H01G4/04 主分类号 H01G4/38
代理机构 代理人
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