发明名称 半導体装置
摘要 A semiconductor layer, a well region, and a source region form a unit cell. The unit cell is defined into a certain shape in plan view at a main surface of the semiconductor layer, and a plurality of the unit cells is coupled in a chain manner to form a unit chain structure with a constriction. The certain shape of the unit cell is defined by an outer edge of a virtual region of the semiconductor layer defined so as to include the source region and the well region inside and by respective outer edges of the source region and the well region at a joint with a different unit cell. An active region is composed of a plurality of the unit chain structures. The unit chain structures are arranged so as to avoid generation of a gap between the unit cells of adjacent ones of the unit chain structures.
申请公布号 JP5687364(B2) 申请公布日期 2015.03.18
申请号 JP20130552393 申请日期 2012.11.09
申请人 三菱電機株式会社 发明人 三浦 成久;日野 史郎;大塚 健一
分类号 H01L29/78;H01L21/28;H01L21/336;H01L27/04;H01L29/06;H01L29/12 主分类号 H01L29/78
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