| 摘要 |
<p>PROBLEM TO BE SOLVED: To conduct a test on access to continuous columns at a high rate closer to a rate of a normal operation even after a semiconductor device is integrated with a control chip such as SiP or PoP.SOLUTION: A semiconductor device includes: a memory cell array including a plurality of bit lines; a first address latch unit holding first address information; a second address latch unit holding second address information; a first selection circuit that is connected to the first and second address latch units, that has a first control terminal to which a first selection signal is supplied, and that outputs the first address information if the first selection signal is at a first logical level or outputs the second address information if the first selection signal is at a second logical level; and a decoder circuit that selects one or a plurality of bit lines from among the bit lines in response to the first or second address information output from the first selection circuit.</p> |
