| 发明名称 |
FRACTIONAL FREQUENCY DIVIDING CIRCUIT AND TRANSMITTER |
| 摘要 |
According to one embodiment, there is provided a fractional frequency dividing circuit including an integral frequency dividing circuit and an adjustment circuit. The integral frequency dividing circuit is configured to convert a reference signal to K (K is a positive integer) phase signals. Each of the K phase signals has a frequency of one nth (n is a positive integer) of the reference signal and has different phases from each other. The adjustment circuit is configured to weighting-add a plurality of signals corresponding to the K phase signals and generate a fractional-frequency-divided signal. The fractional-frequency-divided signal has a frequency of m times (m is a positive integer that is not multiplies of n) of each of the plurality of phase signals. |
| 申请公布号 |
US2015055726(A1) |
申请公布日期 |
2015.02.26 |
| 申请号 |
US201414167726 |
申请日期 |
2014.01.29 |
| 申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
Yamaji Takafumi;Suzuki Tsuneo |
| 分类号 |
H03B19/14;H04B1/04 |
主分类号 |
H03B19/14 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A fractional frequency dividing circuit comprising:
an integral frequency dividing circuit configured to convert a reference signal to K (K is a positive integer) phase signals each having a frequency of one nth (n is a positive integer) of the reference signal and having different phases from each other; and an adjustment circuit configured to weighting-add a plurality of signals corresponding to the K phase signals and generate a fractional-frequency-divided signal having a frequency of m times (m is a positive integer that is not multiplies of n) of each of the plurality of phase signals. |
| 地址 |
Tokyo JP |
