发明名称 MEMORY CONTROLLER, MEMORY CONTROLLER CONTROL METHOD, AND INFORMATION PROCESSING APPARATUS
摘要 <p>PROBLEM TO BE SOLVED: To provide a memory controller, a memory controller control method, and an information processing apparatus capable of reducing time for changing setting of frequency and voltage.SOLUTION: A set value holding register 14 stores therein control information on a memory 20 and a clock frequency supplied to the memory 20 while making the control information to the clock frequency. A memory access control circuit 11 determines whether control information corresponding to a designated clock frequency is present in the set value holding register 14. A memory tuning circuit 13 determines control information corresponding to the designated clock frequency if the memory access control circuit 11 determines that the control information corresponding to the designated clock frequency is not present in the set value holding register 14. A data transmitting-receiving module 12 controls the memory 20 on the basis of the control information determined by the memory tuning circuit 13 if the memory access control circuit 11 determines that the control information corresponding to the designated clock frequency is not present in the set value holding register 14.</p>
申请公布号 JP2015036965(A) 申请公布日期 2015.02.23
申请号 JP20130169256 申请日期 2013.08.16
申请人 FUJITSU LTD 发明人 NAKAMURA TAKEO
分类号 G06F12/00 主分类号 G06F12/00
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