SUPERWIDE BUS-BASED CHIP ARCHITECTURE AND DATA ACCESS METHOD THEREFOR

摘要

A superwide bus-based chip architecture and a data access method. The chip architecture comprises: a chip which comprises a first operation unit and at least one second operation unit; a memory which comprises a first access unit and at least one second access unit; a first bus which is configured to be suitable for connecting the first operation unit and the second operation unit to the first access unit; and a second bus which is configured to be suitable for connecting the second operation unit to the corresponding second access unit. The data access method comprises: when a data access request comes from the second operation unit in the chip, identifying whether data is stored in the first access unit or the corresponding second access unit; if the data is stored in the second access unit, accessing the second access unit through the second bus; and if the data is stored in the first access unit, accessing the first access unit through the first bus. The chip architecture and the data access method can improve the access efficiency of memory data, improve the overall performance of the system and reduce the power consumption of the system.