发明名称 Operating circuit controlling device, semiconductor memory device and method of operating the same
摘要 A semiconductor memory device is kept in a busy state by controlling a ready/busy pad when a detection signal is output since an external voltage is less than a reference voltage, prevents generation of an operating voltage by a pump circuit by preventing generation of a pump clock, and resets a microcontroller by preventing generation of micro clock. Accordingly, the semiconductor memory device may be prevented from malfunctioning through a series of operations when the external voltage is less than the reference voltage.
申请公布号 US8953383(B2) 申请公布日期 2015.02.10
申请号 US201313845218 申请日期 2013.03.18
申请人 SK Hynix Inc. 发明人 Yoo Byoung Sung;Park Jin Su;Lee Sang Don
分类号 G11C16/06;G11C16/10;G11C16/04;G11C16/22;G11C16/32 主分类号 G11C16/06
代理机构 William Park & Associates Patent Ltd. 代理人 William Park & Associates Patent Ltd.
主权项 1. An operating circuit controlling device, comprising: a detection circuit configured to compare an external voltage with a reference voltage and activate a detection signal when the external voltage is less than the reference voltage; a control logic configured to keep an operating circuit in a busy state in response to the detection signal; a control signal generation circuit configured to generate first and second control signals in response to the detection signal; a pump clock generation circuit configured to generate a pump clock to be input to a pump circuit to generate an operating voltage of the operating circuit, wherein the pump clock generation circuit is configured to be disabled in response to the first control signal; a micro clock generation circuit configured to generate a micro clock, wherein the mircoclock generation circuit is configured to be disabled in response to the first control signal; and a microcontroller configured to control the operating circuit in response to the micro clock, wherein the microcontroller is configured to be reset in response to the second control signal when the micro clock generation circuit is disabled in response to the first control signal.
地址 Gyeonggi-do KR