Memory with isolation structure

摘要

A recessed transistor construction is formed between a first access transistor construction and a second access transistor construction to provide isolation between the access transistor constructions of a memory device. In some embodiments, a gate of the recessed transistor construction is grounded. In an embodiment, the access transistor constructions are recess access transistors. In an embodiment, the memory device is a DRAM. In another embodiment, the memory device is a 4.5F2 DRAM cell.

主权项

1. An apparatus comprising:
a substrate having a doping concentration; a memory cell comprising a charge storage device and a recessed access device, wherein the recessed access device extends into the substrate and is configured to induce a first depletion region in the substrate; and an isolation structure configured to isolate the memory cell from an adjacent memory cell, wherein the apparatus is configured such that during operation the isolation structure receives a bias voltage that together with the doping concentration of the substrate induces a second depletion region in the substrate that merges with the first depletion region.