JLT (junction-less transistor) device and method for fabricating the same

摘要

A method for fabricating a junction-less transistor device that includes a substrate, a buried dielectric layer having a fin structure on the substrate, a doped region formed through the buried dielectric layer in the substrate, a semiconductor layer overlying the buried dielectric layer and the doped region, a gate structure on the semiconductor layer, and source/drain regions in the semiconductor layer at opposite sides of the gate structure. The semiconductor layer includes first, second, third regions, with the second region interposed between the first and second regions and disposed underneath the gate electrode structure. The first, second, and third regions have a same doping polarity. The second region has a doping concentration less than those of the first and second regions. The second region and the doped region have opposite doping polarities. The second region has a groove in contact with a bottom portion of the gate structure.

主权项

1. A junction less-transistor comprising:
a substrate; a buried dielectric layer having a fin structure on the substrate; a doped region formed through the buried dielectric layer and in the substrate; a semiconductor material layer overlying the buried dielectric layer and the doped region; a gate structure wrapping around a portion of the semiconductor material layer; and source/drain structures formed in the semiconductor material layer at opposite sides of the gate structure; wherein the semiconductor material layer comprises: a first region having a first doping concentration; and a second region adjacent to the first region and having a second doping concentration, the second region comprising a groove in contact with a bottom portion of the gate structure.