发明名称 UNIT SHIFT REGISTER CIRCUIT, SHIFT REGISTER CIRCUIT, METHOD FOR CONTROLLING UNIT SHIFT REGISTER CIRCUIT, AND DISPLAY DEVICE
摘要 Provided is a unit shift register circuit which constitutes each stage of a shift register circuit, and which includes: an output transistor (T1) in which a predetermined clock signal is input to the drain terminal, and which outputs an output signal (OUT) from the source terminal; and a setting transistor (T2), wherein the transistor (T2) is connected at the source terminal thereof to one gate electrode of the output transistor (T1), an input signal (S) is input to the drain terminal, and an input signal (VS) of higher voltage than the voltage of the input signal (S) is input to the gate electrode during charging of the gate electrode (node (VC)) of the output transistor (T1).
申请公布号 WO2014208123(A1) 申请公布日期 2014.12.31
申请号 WO2014JP54517 申请日期 2014.02.25
申请人 SHARP KABUSHIKI KAISHA 发明人 YAMAMOTO KAORU;OGAWA YASUYUKI
分类号 G11C19/28;G09G3/20;G09G3/36;G11C19/00 主分类号 G11C19/28
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