发明名称 Semiconductor package and method of forming similar structure for top and bottom bonding pads
摘要 A semiconductor device includes a first semiconductor die. A plurality of conductive vias is formed around the first semiconductor die. A first conductive layer is formed over a first surface of the first semiconductor die and electrically connects to the plurality of conductive vias. A second conductive layer is formed over a second surface of the first semiconductor die opposite the first surface and electrically connects to the plurality of conductive vias. A first passivation layer is formed over the first surface and includes openings that expose the first conductive layer. A second passivation layer is formed over the second surface and includes openings that expose the second conductive layer. Bonding pads are formed within the openings in the first and second passivation layers and are electrically connected to the first and second conductive layers. An interconnect structure is disposed within the openings in the first and second passivation layers.
申请公布号 US8921983(B2) 申请公布日期 2014.12.30
申请号 US201113235413 申请日期 2011.09.18
申请人 STATS ChipPAC, Ltd. 发明人 Tay Lionel Chien Hui;Bathan Henry D.;Camacho Zigmund R.
分类号 H01L25/10;H01L25/065;H01L23/538;H01L21/683;H01L23/00;H01L23/31;H01L23/495 主分类号 H01L25/10
代理机构 Patent Law Group: Atkins and Associates, P.C. 代理人 Atkins Robert D.;Patent Law Group: Atkins and Associates, P.C.
主权项 1. A semiconductor device, comprising: a first semiconductor die; a plurality of conductive vias formed around the first semiconductor die; a first conductive layer formed over a first surface of the first semiconductor die and electrically connected to the plurality of conductive vias; a second conductive layer formed over a second surface of the first semiconductor die opposite the first surface and electrically connected to the plurality of conductive vias; a first insulating layer formed over the first surface of the first semiconductor die and including openings exposing the first conductive layer; a second insulating layer formed over the second surface of the first semiconductor die and including openings exposing the second conductive layer; a plurality of bonding pads formed within the openings in the first and second insulating layers; and an interconnect structure disposed within the openings in the first and second insulating layers.
地址 Singapore SG