Interrupt on/off management apparatus and method for multi-core processor

摘要

Provided are an interrupt on/off management apparatus and method for a multi-core processor having a plurality of central processing unit (CPU) cores. The interrupt on/off management apparatus manages the multi-core processor such that at least one of two or more CPU cores included in a target CPU set can execute an urgent interrupt. For example, the interrupt on/off management apparatus controls the movement of each CPU core from a critical section to a non-critical section such that at least one of the CPU cores is located in the non-critical section. The critical section may include an interrupt-disabled section or a kernel non-preemptible section, and the non-critical section may include an interrupt-enabled section or include both of the interrupt-enabled section and a kernel preemptible section.

主权项

1. An interrupt on/off management apparatus for a multi-core processor comprising n (≧2) central processing unit (CPU) cores, the apparatus comprising:
a determination unit configured to determine whether one or more of m (2≦m≦n) CPU cores included in a target CPU set among the n CPU cores is located in a critical section or a non-critical section based on interrupt on/off information indicating a section in which each of the m CPU cores is located; and a control unit configured to control the m CPU cores such that one or more of the m CPU cores are located in the non-critical section, based on the determination result of the determination unit, wherein the determination unit is operatively connected to the control unit.