发明名称 |
Clocked Reference Buffer in a Successive Approximation Analog-to-Digital Converter |
摘要 |
A voltage reference circuit includes a capacitor including a first terminal and including a second terminal coupled to a power supply node. The voltage reference circuit further includes an amplifier, a first transistor, and a switch. The amplifier includes a first input configured to receive a reference voltage input signal, a second input configured to receive a feedback signal, and an output. The first transistor includes a source coupled to the second input of the amplifier and to an output node, a gate coupled to the capacitor, and a drain. The first transistor is configured to provide a reference voltage at the source based on a charge provided to the gate by the capacitor. The switch includes a first terminal coupled to the output of the amplifier, and includes a second terminal coupled to the first terminal of the capacitor. |
申请公布号 |
US2014333465(A1) |
申请公布日期 |
2014.11.13 |
申请号 |
US201313892235 |
申请日期 |
2013.05.10 |
申请人 |
Elsayed Mohamed;Wang Xiaodong;Yan Shouli |
发明人 |
Elsayed Mohamed;Wang Xiaodong;Yan Shouli |
分类号 |
H03M1/12 |
主分类号 |
H03M1/12 |
代理机构 |
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代理人 |
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主权项 |
1. A voltage reference circuit comprising:
a first transistor including a source coupled to an output node configured to provide a reference voltage, and including a gate, and a drain; a capacitor coupled to the gate; a switch configured to selectively provide a voltage to the capacitor during a first phase of an analog-to-digital converter (ADC) conversion operation and to decouple the voltage from the capacitor during a second phase of the ADC conversion operation; and a bias current regulator circuit coupled to the drain of the first transistor and configured to control a bias current at the drain of the transistor. |
地址 |
Austin TX US |