发明名称 Flyback switching regulator with primary side regulation
摘要 The disclosed switching regulator, including a controller for a switching regulator, is adaptable to supplying, or controlling the supply of, regulated current to a load that is isolated from a source of input power by a flyback transformer, and includes: (a) detecting, after transistor SWOFF, a zero crossing ZCD corresponding to a primary side switching node voltage VSW decreasing to the input voltage Vin, which occurs after a secondary current IS is substantially zero and before the next SWON; (c) establishing a time-integral window T-I_W with a leading edge corresponding to SWOFF and a trailing edge corresponding to ZCD; and (d) modulating at least the time SWOFF relative to SWON based on the primary peak current IPP at SWOFF and the time-integral window, such that a regulated load current is supplied to the load.
申请公布号 US8884551(B2) 申请公布日期 2014.11.11
申请号 US201313741069 申请日期 2013.01.14
申请人 Texas Instruments Incorporated 发明人 Ling Hok-Sun
分类号 G05F1/00;H02M3/335 主分类号 G05F1/00
代理机构 代理人 Viger Andrew;Telecky, Jr. Frederick J.
主权项 1. A circuit for controlling a switching regulator including a flyback transformer with primary and secondary windings and a switching transistor coupled to the primary side winding at a switching node SW, and configured to supply regulated current to a load that is isolated from a source of input power by the flyback transformer, the circuit comprising: controller circuitry configured to switch the transistor on at a time SWON and off at a time SWOFF, such that a primary current IP through the primary side winding increases from substantially zero at SWON to a primary peak current IPP at SWOFF, thereby inducing in the secondary side winding a secondary current IS that decreases from a peak current ISP at SWOFF to substantially zero before the transistor is switched on at a next SWON, in accordance with discontinuous conduction mode operation; a zero crossing detect circuit configured to detect, after SWOFF, a zero crossing ZCD corresponding to a voltage VSW at the primary side switching node SW decreasing in magnitude to an input voltage VIN, which occurs after the secondary current IS is substantially zero and before the transistor is switched on at the next SWON; and time-integral circuitry configured to establish a time-integral window T-I_W with a leading edge corresponding to SWOFF and a trailing edge corresponding to ZCD; the controller circuitry operable to modulate at least the time SWOFF relative to SWON based on the primary peak current IPP at SWOFF and the time-integral window T-I_W, such that a regulated load current is supplied to the load.
地址 Dallas TX US