TIME-TO-DIGITAL CONVERSION WITH ANALOG DITHERING

摘要

There is described a time-to-digital conversion scheme using an arrangement of delay elements based Time-to-Digital Converter, TDC (20), wherein dithering is built in the digital domain and introduced in the analog domain as a modulation of a supply voltage (TDC-supply) supplying delay elements of the TDC, each having a propagation delay which exhibits a dependency to their supply voltage.

主权项

1. A time-to-digital conversion device with analog dithering, configured to convert a time interval between an active edge of a first signal and an active edge of a second signal into a binary output value, comprising:
a time-to-digital converter, TDC, comprising:
an arrangement of a number Q of cascaded delay elements (G1-GQ) each having a propagation delay that exhibits a dependency to a supply voltage, the arrangement receiving the first signal in input;a set of Q sampling elements configured to generate Q sample values by sampling respective outputs of the Q delay elements responsive to the active edge of a second signal;an encoder configured to generate the binary output value (TDC_output) from the Q sample values; and a dithering arrangement comprising:
a digital dithering signal generator, configured to generate a dithering signal (DS) in the digital domain; anda supply voltage generator configured to generate the supply voltage of the delay elements of the TDC, with respect to the dithering signal.